Sr. Staff Design Verification Engineer

Lightmatter is a photonic computer company that is redefining what computers and human beings are capable of by building the engines that will drive discoveries and progress sustainably. With modern human progress relying heavily on computers, the world has hit a dead end with traditional transistors, and the prospect of constantly building data centers is an environmental nightmare. Lightmatter builds chips for artificial intelligence computing. Our architecture leverages the unique properties of light to enable a fast and efficient compute platform. We created a solution in photonic computing: using photons instead of electrons to take advantage of their higher bandwidth.

If you have a passion for working cross-functionally, leading projects to success, and doing impactful work, like helping build the world's first optical computers, you should join the team at Lightmatter!

We are hiring a Sr. Staff Design Verification Engineer to join our team and help orchestrate the hardware engineering efforts on Lightmatter's chip design and tape-outs.

In this job, you will work in constant collaboration with hardware engineering teams across the company to plan and drive objectives for the design verification group. You'll be gathering requirements, driving processes, managing technical risks, and planning for all phases of design verification. You will work with the engineering leadership to develop and manage milestones and schedules for the many moving parts that need to come together for a successful design execution.

Responsibilities:

• Engage collaboratively with teams specializing in digital, photonics, and analog design to develop comprehensive test plans.

• Design and implement UVM testbenches for both subsystem-level and full-chip verification. This includes debugging testbenches, resolving issues, achieving high coverage, and overseeing the final sign-off on Design Verification (DV).

• Develop Real Number Models (RNM) for photonics and analog circuits, conduct AMS verification in conjunction with UVM, and ensure precise model representation. Contribute significantly to the development of the Golden Reference Model (GRM) for design verification. Play an integral role in the execution of emulation and formal verification for DV purposes.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, a related field, or equivalent experience

• 12 years of design verification and SystemVerilog experience

• 2+ years of experience in python

• Expertise in developing the UVM library

• Experience with simulators such as Xcelium, ModelSim, Questa, or VCS

Preferred Qualifications

• Master’s degree or higher in Electrical Engineering, Computer Engineering, a related field, or equivalent experience with 8 years of design verification and Systemverilog experience

• Knowledgeable about assertion languages, power verification, reset-domain crossing verification, and AMS verification

• Strong problem solver, communicator, and team player with the ability to work with teams across multiple sites

• Ability to react to change and thrive in a fast-paced (startup) environment

• Communicates complex concepts effectively to diverse stakeholders, fostering support and consensus for initiatives

• Previous leadership experience

Benefits

• Comprehensive Health Care Plan (Medical, Dental & Vision)

• 401k matching

• Life Insurance (Basic, Voluntary & AD&D)

• Generous Time Off (Vacation, Sick & Public Holidays)

• Paid Family Leave

• Short Term & Long Term Disability

• Training & Development

• Flexible, hybrid workplace model

• Stock Option Plan

We offer competitive compensation. The base salary range for this role, inclusive of all US locations, is $200,000 - $250,000 Your base salary will be determined based on location, experience, educational background, and market data.

Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.