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Nvidia Physical Design Engineer – Custom Circuits in Santa Clara, California

We are now looking for a Senior Physical Design Engineer in our Circuits Solutions Group!

NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s motivated by great technology, outstanding people and a multifaceted workforce! Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you will be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join our diverse team and see how you can make a lasting impact on the world!

What you'll be doing:

  • Work as part of a global circuits team to design innovative circuits for hardware security, adaptive clocking, and power management solutions.

  • Responsible for all aspects of physical design and implementation of GPU and other ASICs targeted at the desktop, laptop, workstation, and mobile markets.

  • Participate in establishing physical design methodologies, flow automation, floorplan, power/clock distribution, IP and toplevel P&R, and timing closure.

  • Drive the physical implementation of custom digital IPs from conception to layout using industry standard tools and custom design flows.

  • Create prototypes of patentable ideas on test chips and drive them to be deployed across the entire line of products.

  • Collaborate with cross-functional teams to improve the performance and reliability of NVIDIA's next generation products through custom circuit solutions and detailed transistor-level analysis.

What we need to see:

  • BSEE (MSEE preferred) or equivalent experience.

  • 3+ years of experience in large VLSI physical design implementation on 5nm, 4nm and/or 3nm technology.

  • Successful track record of delivering designs to production is a requirement.

  • Already a validated strong power user of P&R, Timing analysis, Physical Verification and IR Drop Analysis CAD tools from Synopsys (ICC2/DC/PT/STAR-RC/ICV), Cadence (Innovus, Tempus, SeaHawk ) and Mentor Graphics.

  • Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/route and tapeout solutions.

  • To be successful you should possess strong analytical and debugging skills required.

  • Proficiency using Python, Perl, Tcl, Make scripting is helpful.

  • Good understanding of process issues and digital circuit design techniques.

  • Strong understanding of transistor level fundamentals.

  • Hands on experience running Spice simulations, EM/IR analysis, and some transistor level timing analysis

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the technology world’s most desirable employers. We welcome you join our team with some of the most hard-working people in the world working together to promote rapid growth. Are you passionate about becoming a part of a best-in-class team supporting the latest in GPU and AI technology? If so, we want to hear from you.

The base salary range is 128,000 USD - 258,750 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits (https://www.nvidia.com/en-us/benefits/) . NVIDIA accepts applications on an ongoing basis.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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